/*
 * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.h =============
 *  Configured MSPM0 DriverLib module declarations
 *
 *  DO NOT EDIT - This file is generated for the MSPM0G350X
 *  by the SysConfig tool.
 */
#ifndef ti_msp_dl_config_h
#define ti_msp_dl_config_h

#define CONFIG_MSPM0G350X
#define CONFIG_MSPM0G3507

#if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
#define SYSCONFIG_WEAK __attribute__((weak))
#elif defined(__IAR_SYSTEMS_ICC__)
#define SYSCONFIG_WEAK __weak
#elif defined(__GNUC__)
#define SYSCONFIG_WEAK __attribute__((weak))
#endif

#include <ti/devices/msp/msp.h>
#include <ti/driverlib/driverlib.h>
#include <ti/driverlib/m0p/dl_core.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform all required MSP DL initialization
 *
 *  This function should be called once at a point before any use of
 *  MSP DL.
 */


/* clang-format off */

#define POWER_STARTUP_DELAY                                                (16)


#define GPIO_HFXT_PORT                                                     GPIOA
#define GPIO_HFXIN_PIN                                             DL_GPIO_PIN_5
#define GPIO_HFXIN_IOMUX                                         (IOMUX_PINCM10)
#define GPIO_HFXOUT_PIN                                            DL_GPIO_PIN_6
#define GPIO_HFXOUT_IOMUX                                        (IOMUX_PINCM11)
#define CPUCLK_FREQ                                                     80000000



/* Defines for PWM_G7 */
#define PWM_G7_INST                                                        TIMG7
#define PWM_G7_INST_IRQHandler                                  TIMG7_IRQHandler
#define PWM_G7_INST_INT_IRQN                                    (TIMG7_INT_IRQn)
#define PWM_G7_INST_CLK_FREQ                                             1000000
/* GPIO defines for channel 0 */
#define GPIO_PWM_G7_C0_PORT                                                GPIOB
#define GPIO_PWM_G7_C0_PIN                                        DL_GPIO_PIN_15
#define GPIO_PWM_G7_C0_IOMUX                                     (IOMUX_PINCM32)
#define GPIO_PWM_G7_C0_IOMUX_FUNC                    IOMUX_PINCM32_PF_TIMG7_CCP0
#define GPIO_PWM_G7_C0_IDX                                   DL_TIMER_CC_0_INDEX
/* GPIO defines for channel 1 */
#define GPIO_PWM_G7_C1_PORT                                                GPIOB
#define GPIO_PWM_G7_C1_PIN                                        DL_GPIO_PIN_16
#define GPIO_PWM_G7_C1_IOMUX                                     (IOMUX_PINCM33)
#define GPIO_PWM_G7_C1_IOMUX_FUNC                    IOMUX_PINCM33_PF_TIMG7_CCP1
#define GPIO_PWM_G7_C1_IDX                                   DL_TIMER_CC_1_INDEX

/* Defines for A4950 */
#define A4950_INST                                                         TIMA0
#define A4950_INST_IRQHandler                                   TIMA0_IRQHandler
#define A4950_INST_INT_IRQN                                     (TIMA0_INT_IRQn)
#define A4950_INST_CLK_FREQ                                              5000000
/* GPIO defines for channel 0 */
#define GPIO_A4950_C0_PORT                                                 GPIOB
#define GPIO_A4950_C0_PIN                                         DL_GPIO_PIN_14
#define GPIO_A4950_C0_IOMUX                                      (IOMUX_PINCM31)
#define GPIO_A4950_C0_IOMUX_FUNC                     IOMUX_PINCM31_PF_TIMA0_CCP0
#define GPIO_A4950_C0_IDX                                    DL_TIMER_CC_0_INDEX
/* GPIO defines for channel 1 */
#define GPIO_A4950_C1_PORT                                                 GPIOB
#define GPIO_A4950_C1_PIN                                          DL_GPIO_PIN_9
#define GPIO_A4950_C1_IOMUX                                      (IOMUX_PINCM26)
#define GPIO_A4950_C1_IOMUX_FUNC                     IOMUX_PINCM26_PF_TIMA0_CCP1
#define GPIO_A4950_C1_IDX                                    DL_TIMER_CC_1_INDEX
/* GPIO defines for channel 2 */
#define GPIO_A4950_C2_PORT                                                 GPIOA
#define GPIO_A4950_C2_PIN                                          DL_GPIO_PIN_3
#define GPIO_A4950_C2_IOMUX                                       (IOMUX_PINCM8)
#define GPIO_A4950_C2_IOMUX_FUNC                      IOMUX_PINCM8_PF_TIMA0_CCP2
#define GPIO_A4950_C2_IDX                                    DL_TIMER_CC_2_INDEX
/* GPIO defines for channel 3 */
#define GPIO_A4950_C3_PORT                                                 GPIOA
#define GPIO_A4950_C3_PIN                                          DL_GPIO_PIN_4
#define GPIO_A4950_C3_IOMUX                                       (IOMUX_PINCM9)
#define GPIO_A4950_C3_IOMUX_FUNC                      IOMUX_PINCM9_PF_TIMA0_CCP3
#define GPIO_A4950_C3_IDX                                    DL_TIMER_CC_3_INDEX



/* Defines for TIMER_0 */
#define TIMER_0_INST                                                     (TIMG6)
#define TIMER_0_INST_IRQHandler                                 TIMG6_IRQHandler
#define TIMER_0_INST_INT_IRQN                                   (TIMG6_INT_IRQn)
#define TIMER_0_INST_LOAD_VALUE                                            (99U)
/* Defines for TIMER_A1 */
#define TIMER_A1_INST                                                    (TIMA1)
#define TIMER_A1_INST_IRQHandler                                TIMA1_IRQHandler
#define TIMER_A1_INST_INT_IRQN                                  (TIMA1_INT_IRQn)
#define TIMER_A1_INST_LOAD_VALUE                                          (799U)




/* Defines for I2C_VL53L0X */
#define I2C_VL53L0X_INST                                                    I2C0
#define I2C_VL53L0X_INST_IRQHandler                              I2C0_IRQHandler
#define I2C_VL53L0X_INST_INT_IRQN                                  I2C0_INT_IRQn
#define I2C_VL53L0X_BUS_SPEED_HZ                                          400000
#define GPIO_I2C_VL53L0X_SDA_PORT                                          GPIOA
#define GPIO_I2C_VL53L0X_SDA_PIN                                   DL_GPIO_PIN_0
#define GPIO_I2C_VL53L0X_IOMUX_SDA                                (IOMUX_PINCM1)
#define GPIO_I2C_VL53L0X_IOMUX_SDA_FUNC                 IOMUX_PINCM1_PF_I2C0_SDA
#define GPIO_I2C_VL53L0X_SCL_PORT                                          GPIOA
#define GPIO_I2C_VL53L0X_SCL_PIN                                   DL_GPIO_PIN_1
#define GPIO_I2C_VL53L0X_IOMUX_SCL                                (IOMUX_PINCM2)
#define GPIO_I2C_VL53L0X_IOMUX_SCL_FUNC                 IOMUX_PINCM2_PF_I2C0_SCL


/* Defines for UART_0 */
#define UART_0_INST                                                        UART0
#define UART_0_INST_FREQUENCY                                           40000000
#define UART_0_INST_IRQHandler                                  UART0_IRQHandler
#define UART_0_INST_INT_IRQN                                      UART0_INT_IRQn
#define GPIO_UART_0_RX_PORT                                                GPIOA
#define GPIO_UART_0_TX_PORT                                                GPIOA
#define GPIO_UART_0_RX_PIN                                        DL_GPIO_PIN_31
#define GPIO_UART_0_TX_PIN                                        DL_GPIO_PIN_28
#define GPIO_UART_0_IOMUX_RX                                      (IOMUX_PINCM6)
#define GPIO_UART_0_IOMUX_TX                                      (IOMUX_PINCM3)
#define GPIO_UART_0_IOMUX_RX_FUNC                       IOMUX_PINCM6_PF_UART0_RX
#define GPIO_UART_0_IOMUX_TX_FUNC                       IOMUX_PINCM3_PF_UART0_TX
#define UART_0_BAUD_RATE                                                (115200)
#define UART_0_IBRD_40_MHZ_115200_BAUD                                      (21)
#define UART_0_FBRD_40_MHZ_115200_BAUD                                      (45)
/* Defines for UART_3 */
#define UART_3_INST                                                        UART3
#define UART_3_INST_FREQUENCY                                           10000000
#define UART_3_INST_IRQHandler                                  UART3_IRQHandler
#define UART_3_INST_INT_IRQN                                      UART3_INT_IRQn
#define GPIO_UART_3_RX_PORT                                                GPIOB
#define GPIO_UART_3_TX_PORT                                                GPIOB
#define GPIO_UART_3_RX_PIN                                         DL_GPIO_PIN_3
#define GPIO_UART_3_TX_PIN                                         DL_GPIO_PIN_2
#define GPIO_UART_3_IOMUX_RX                                     (IOMUX_PINCM16)
#define GPIO_UART_3_IOMUX_TX                                     (IOMUX_PINCM15)
#define GPIO_UART_3_IOMUX_RX_FUNC                      IOMUX_PINCM16_PF_UART3_RX
#define GPIO_UART_3_IOMUX_TX_FUNC                      IOMUX_PINCM15_PF_UART3_TX
#define UART_3_BAUD_RATE                                                (115200)
#define UART_3_IBRD_10_MHZ_115200_BAUD                                       (5)
#define UART_3_FBRD_10_MHZ_115200_BAUD                                      (27)
/* Defines for UART_2 */
#define UART_2_INST                                                        UART2
#define UART_2_INST_FREQUENCY                                           40000000
#define UART_2_INST_IRQHandler                                  UART2_IRQHandler
#define UART_2_INST_INT_IRQN                                      UART2_INT_IRQn
#define GPIO_UART_2_RX_PORT                                                GPIOA
#define GPIO_UART_2_TX_PORT                                                GPIOA
#define GPIO_UART_2_RX_PIN                                        DL_GPIO_PIN_24
#define GPIO_UART_2_TX_PIN                                        DL_GPIO_PIN_23
#define GPIO_UART_2_IOMUX_RX                                     (IOMUX_PINCM54)
#define GPIO_UART_2_IOMUX_TX                                     (IOMUX_PINCM53)
#define GPIO_UART_2_IOMUX_RX_FUNC                      IOMUX_PINCM54_PF_UART2_RX
#define GPIO_UART_2_IOMUX_TX_FUNC                      IOMUX_PINCM53_PF_UART2_TX
#define UART_2_BAUD_RATE                                                (115200)
#define UART_2_IBRD_40_MHZ_115200_BAUD                                      (21)
#define UART_2_FBRD_40_MHZ_115200_BAUD                                      (45)





/* Port definition for Pin Group LED */
#define LED_PORT                                                         (GPIOB)

/* Defines for PIN_1: GPIOB.8 with pinCMx 25 on package pin 22 */
#define LED_PIN_1_PIN                                            (DL_GPIO_PIN_8)
#define LED_PIN_1_IOMUX                                          (IOMUX_PINCM25)
/* Port definition for Pin Group BUZZER */
#define BUZZER_PORT                                                      (GPIOA)

/* Defines for PIN_0: GPIOA.7 with pinCMx 14 on package pin 13 */
#define BUZZER_PIN_0_PIN                                         (DL_GPIO_PIN_7)
#define BUZZER_PIN_0_IOMUX                                       (IOMUX_PINCM14)
/* Defines for KEY1: GPIOA.5 with pinCMx 10 on package pin 11 */
#define KEY_KEY1_PORT                                                    (GPIOA)
#define KEY_KEY1_PIN                                             (DL_GPIO_PIN_5)
#define KEY_KEY1_IOMUX                                           (IOMUX_PINCM10)
/* Defines for KEY2: GPIOA.6 with pinCMx 11 on package pin 12 */
#define KEY_KEY2_PORT                                                    (GPIOA)
#define KEY_KEY2_PIN                                             (DL_GPIO_PIN_6)
#define KEY_KEY2_IOMUX                                           (IOMUX_PINCM11)
/* Defines for KEY3: GPIOB.17 with pinCMx 43 on package pin 36 */
#define KEY_KEY3_PORT                                                    (GPIOB)
#define KEY_KEY3_PIN                                            (DL_GPIO_PIN_17)
#define KEY_KEY3_IOMUX                                           (IOMUX_PINCM43)
/* Defines for KEY4: GPIOB.18 with pinCMx 44 on package pin 37 */
#define KEY_KEY4_PORT                                                    (GPIOB)
#define KEY_KEY4_PIN                                            (DL_GPIO_PIN_18)
#define KEY_KEY4_IOMUX                                           (IOMUX_PINCM44)
/* Port definition for Pin Group GPIO_VL53L0X */
#define GPIO_VL53L0X_PORT                                                (GPIOA)

/* Defines for PIN_XSHUT: GPIOA.17 with pinCMx 39 on package pin 32 */
#define GPIO_VL53L0X_PIN_XSHUT_PIN                              (DL_GPIO_PIN_17)
#define GPIO_VL53L0X_PIN_XSHUT_IOMUX                             (IOMUX_PINCM39)
/* Defines for PIN_GPIO1: GPIOA.2 with pinCMx 7 on package pin 8 */
// groups represented: ["ENCODER","GPIO_VL53L0X"]
// pins affected: ["LIN1","LIN2","PIN_GPIO1"]
#define GPIO_MULTIPLE_GPIOA_INT_IRQN                            (GPIOA_INT_IRQn)
#define GPIO_MULTIPLE_GPIOA_INT_IIDX            (DL_INTERRUPT_GROUP1_IIDX_GPIOA)
#define GPIO_VL53L0X_PIN_GPIO1_IIDX                          (DL_GPIO_IIDX_DIO2)
#define GPIO_VL53L0X_PIN_GPIO1_PIN                               (DL_GPIO_PIN_2)
#define GPIO_VL53L0X_PIN_GPIO1_IOMUX                              (IOMUX_PINCM7)
/* Defines for LIN1: GPIOA.10 with pinCMx 21 on package pin 18 */
#define ENCODER_LIN1_PORT                                                (GPIOA)
#define ENCODER_LIN1_IIDX                                   (DL_GPIO_IIDX_DIO10)
#define ENCODER_LIN1_PIN                                        (DL_GPIO_PIN_10)
#define ENCODER_LIN1_IOMUX                                       (IOMUX_PINCM21)
/* Defines for LIN2: GPIOA.11 with pinCMx 22 on package pin 19 */
#define ENCODER_LIN2_PORT                                                (GPIOA)
#define ENCODER_LIN2_IIDX                                   (DL_GPIO_IIDX_DIO11)
#define ENCODER_LIN2_PIN                                        (DL_GPIO_PIN_11)
#define ENCODER_LIN2_IOMUX                                       (IOMUX_PINCM22)
/* Defines for RIN1: GPIOB.6 with pinCMx 23 on package pin 20 */
#define ENCODER_RIN1_PORT                                                (GPIOB)
// pins affected by this interrupt request:["RIN1","RIN2"]
#define ENCODER_GPIOB_INT_IRQN                                  (GPIOB_INT_IRQn)
#define ENCODER_GPIOB_INT_IIDX                  (DL_INTERRUPT_GROUP1_IIDX_GPIOB)
#define ENCODER_RIN1_IIDX                                    (DL_GPIO_IIDX_DIO6)
#define ENCODER_RIN1_PIN                                         (DL_GPIO_PIN_6)
#define ENCODER_RIN1_IOMUX                                       (IOMUX_PINCM23)
/* Defines for RIN2: GPIOB.7 with pinCMx 24 on package pin 21 */
#define ENCODER_RIN2_PORT                                                (GPIOB)
#define ENCODER_RIN2_IIDX                                    (DL_GPIO_IIDX_DIO7)
#define ENCODER_RIN2_PIN                                         (DL_GPIO_PIN_7)
#define ENCODER_RIN2_IOMUX                                       (IOMUX_PINCM24)
/* Port definition for Pin Group SR04 */
#define SR04_PORT                                                        (GPIOA)

/* Defines for Trig: GPIOA.16 with pinCMx 38 on package pin 31 */
#define SR04_Trig_PIN                                           (DL_GPIO_PIN_16)
#define SR04_Trig_IOMUX                                          (IOMUX_PINCM38)
/* Defines for Echo: GPIOA.15 with pinCMx 37 on package pin 30 */
#define SR04_Echo_PIN                                           (DL_GPIO_PIN_15)
#define SR04_Echo_IOMUX                                          (IOMUX_PINCM37)
/* Defines for L2: GPIOA.27 with pinCMx 60 on package pin 47 */
#define Line_L2_PORT                                                     (GPIOA)
#define Line_L2_PIN                                             (DL_GPIO_PIN_27)
#define Line_L2_IOMUX                                            (IOMUX_PINCM60)
/* Defines for L1: GPIOA.26 with pinCMx 59 on package pin 46 */
#define Line_L1_PORT                                                     (GPIOA)
#define Line_L1_PIN                                             (DL_GPIO_PIN_26)
#define Line_L1_IOMUX                                            (IOMUX_PINCM59)
/* Defines for M: GPIOA.25 with pinCMx 55 on package pin 45 */
#define Line_M_PORT                                                      (GPIOA)
#define Line_M_PIN                                              (DL_GPIO_PIN_25)
#define Line_M_IOMUX                                             (IOMUX_PINCM55)
/* Defines for R1: GPIOB.24 with pinCMx 52 on package pin 42 */
#define Line_R1_PORT                                                     (GPIOB)
#define Line_R1_PIN                                             (DL_GPIO_PIN_24)
#define Line_R1_IOMUX                                            (IOMUX_PINCM52)
/* Defines for R2: GPIOB.20 with pinCMx 48 on package pin 41 */
#define Line_R2_PORT                                                     (GPIOB)
#define Line_R2_PIN                                             (DL_GPIO_PIN_20)
#define Line_R2_IOMUX                                            (IOMUX_PINCM48)




/* Defines for MCAN0 */
#define MCAN0_INST                                                        CANFD0
#define GPIO_MCAN0_CAN_TX_PORT                                             GPIOA
#define GPIO_MCAN0_CAN_TX_PIN                                     DL_GPIO_PIN_12
#define GPIO_MCAN0_IOMUX_CAN_TX                                  (IOMUX_PINCM34)
#define GPIO_MCAN0_IOMUX_CAN_TX_FUNC               IOMUX_PINCM34_PF_CANFD0_CANTX
#define GPIO_MCAN0_CAN_RX_PORT                                             GPIOA
#define GPIO_MCAN0_CAN_RX_PIN                                     DL_GPIO_PIN_13
#define GPIO_MCAN0_IOMUX_CAN_RX                                  (IOMUX_PINCM35)
#define GPIO_MCAN0_IOMUX_CAN_RX_FUNC               IOMUX_PINCM35_PF_CANFD0_CANRX
#define MCAN0_INST_IRQHandler                                 CANFD0_IRQHandler
#define MCAN0_INST_INT_IRQN                                     CANFD0_INT_IRQn


/* Defines for MCAN0 MCAN RAM configuration */
#define MCAN0_INST_MCAN_STD_ID_FILT_START_ADDR     (0)
#define MCAN0_INST_MCAN_STD_ID_FILTER_NUM          (1)
#define MCAN0_INST_MCAN_EXT_ID_FILT_START_ADDR     (48)
#define MCAN0_INST_MCAN_EXT_ID_FILTER_NUM          (1)
#define MCAN0_INST_MCAN_TX_BUFF_START_ADDR         (148)
#define MCAN0_INST_MCAN_TX_BUFF_SIZE               (2)
#define MCAN0_INST_MCAN_FIFO_1_START_ADDR          (192)
#define MCAN0_INST_MCAN_FIFO_1_NUM                 (2)
#define MCAN0_INST_MCAN_TX_EVENT_START_ADDR        (164)
#define MCAN0_INST_MCAN_TX_EVENT_SIZE              (2)
#define MCAN0_INST_MCAN_EXT_ID_AND_MASK            (0x1FFFFFFFU)
#define MCAN0_INST_MCAN_RX_BUFF_START_ADDR         (208)
#define MCAN0_INST_MCAN_FIFO_0_START_ADDR          (172)
#define MCAN0_INST_MCAN_FIFO_0_NUM                 (3)

#define MCAN0_INST_MCAN_INTERRUPTS (DL_MCAN_INTERRUPT_RF0N)



/* clang-format on */

void SYSCFG_DL_init(void);
void SYSCFG_DL_initPower(void);
void SYSCFG_DL_GPIO_init(void);
void SYSCFG_DL_SYSCTL_init(void);
void SYSCFG_DL_PWM_G7_init(void);
void SYSCFG_DL_A4950_init(void);
void SYSCFG_DL_TIMER_0_init(void);
void SYSCFG_DL_TIMER_A1_init(void);
void SYSCFG_DL_I2C_VL53L0X_init(void);
void SYSCFG_DL_UART_0_init(void);
void SYSCFG_DL_UART_3_init(void);
void SYSCFG_DL_UART_2_init(void);

void SYSCFG_DL_SYSTICK_init(void);
void SYSCFG_DL_MCAN0_init(void);

bool SYSCFG_DL_saveConfiguration(void);
bool SYSCFG_DL_restoreConfiguration(void);

#ifdef __cplusplus
}
#endif

#endif /* ti_msp_dl_config_h */
